1. Field of the Invention
This invention generally relates to a shift register, and more particularly to a shift register and a shift register set by changing the circuit driving signal from the dynamic signal to the static signal so that the circuit can operate only when the signal is “0” or “1”.
2. Description of Related Art
For current PMOS shift registers, the driving signal is dynamic so that the circuit may operate even when the signal is not “0” or “1”. Further, during the rising time and falling time of the driving signal, the circuit will be affected and circuit cannot operate accurately. In addition, because driving signal is dynamic, for the existing device manufacturing technology, there is an existing risk.
FIG. 7 is the block diagram of a conventional shift register set. In FIG. 7, the shift register set 700 includes shift registers 702, 712, 722 and 732. Each shift register includes a first input terminal 704, 714, 724 or 734, and a second input terminal 706, 716, 726 or 736. The shift registers 702, 712, 722 and 732 are similar in structure, and are connected in series. In the prior art, each of the shift register 702, 712, 722 and 732 is made of CMOS comprising a NMOS transistor and a PMOS transistor. Because it uses CMOS, four input signals are required, with two input signals for a set of alternate shift registers 702 and 722, another two input signals for another set of alternate shift registers 712 and 732.
FIG. 8 is the circuit diagram of the conventional shift register. The existing shift registers 702, 712, 722 and 732 can each have a structure similar to the shift register 800 (e.g., shift register sold by SONY) shown in FIG. 8. The shift register 800 includes a CMOS (transistors P1 and N1), a NOR gate X1, a reset transistor P2, and inverters X2, X3, X4, X5, X6 and X7. In FIG. 8, the shift register 800 receives a first input signal, a second input signal, and a clock signal, and will determine whether or not to turn on the transistors P1 and N1 based on the first input signal and the second input signal. The shift register 800 then outputs an output signal from inverter X5 after the signal passes through the inverters X7, X3 and X6.
In light of the above, the driving signal of the traditional shift register is dynamic and thus the circuit may operate when the driving signal is transient between “0” and “1”. Further, during the rising time and falling time of the driving signal, the circuit will be affected and thus the shift register cannot operate accurately.